Signed Binary Numbers

Signed Binary Numbers: The Complete Guide to Representing Negative Values

Introduction to Signed Binary Representation

In our previous tutorials, we explored how computers perform arithmetic using binary numbers. However, those examples only dealt with unsigned binary numbers, which can only represent zero and positive values. In the real world, mathematics requires negative numbers. Whether you are calculating a bank account overdraft, processing audio waveforms that oscillate above and below zero, or tracking temperature drops, a digital system must be able to represent negative values.

But how does a computer, which only understands 1s and 0s, know that a number is negative? There is no minus sign (-) in binary logic.

To solve this, computer scientists developed signed binary number representations. These systems dedicate the leftmost bit (the Most Significant Bit, or MSB) to act as a sign bit, while the remaining bits represent the magnitude. Over the years, three primary methods have been developed: Sign-Magnitude, 1’s Complement, and 2’s Complement. Today, 2’s Complement is the universal industry standard, used in virtually every modern processor and programming language.

This comprehensive guide will break down all three methods, explain why 2’s complement reigns supreme, and teach you how to calculate ranges and detect arithmetic overflow in signed binary systems.

How do computers represent negative binary numbers?
Computers primarily use the 2’s complement method to represent negative binary numbers. In an n-bit system, the Most Significant Bit (MSB) acts as the sign bit (0 for positive, 1 for negative). To find the negative of a number, you invert all its bits (1’s complement) and add 1. This method allows computers to use the exact same addition circuitry for both positive and negative numbers.

Method 1: Sign-Magnitude Representation

The most intuitive way to represent a signed number is to mimic how we write them in decimal: use a sign and a magnitude (absolute value).

How It Works

In an n-bit sign-magnitude system:

• The Most Significant Bit (MSB) is the sign bit: 0 means positive, 1 means negative.
• The remaining (n-1) bits represent the absolute magnitude of the number in standard binary.

Example: 8-Bit Sign-Magnitude

Let’s represent +5 and -5 in an 8-bit system.

• +5: Sign bit is 0. Magnitude of 5 is 0000101. Combined: 00000101
• -5: Sign bit is 1. Magnitude of 5 is 0000101. Combined: 10000101

The Fatal Flaw: Dual Zeros

While intuitive, sign-magnitude has a major drawback for hardware design: it has two representations for zero.

• +0: 00000000
• -0: 10000000

This dual zero complicates the Arithmetic Logic Unit (ALU). The processor must constantly check if a result is “negative zero” and convert it, requiring extra logic gates and slowing down calculations. Furthermore, adding a positive and negative number in sign-magnitude requires a completely different circuit than adding two positive numbers.

Method 2: 1’s Complement

To simplify the hardware, engineers developed 1’s complement.

How It Works

• Positive numbers are represented exactly the same as in sign-magnitude (MSB = 0).
• To represent a negative number, you take the positive binary equivalent and invert every single bit (change all 0s to 1s, and all 1s to 0s).

Example: 8-Bit 1’s Complement

Let’s represent -5.

1. Start with +5: 00000101
2. Invert all bits: 11111010

The Fatal Flaw: Dual Zeros (Again)

Unfortunately, 1’s complement also suffers from the dual zero problem:

• +0: 00000000
• -0: 11111111 (all bits inverted)

Additionally, 1’s complement arithmetic requires an “end-around carry.” If an addition produces a carry-out of the MSB, that carry must be added back to the least significant bit (LSB). This extra step adds complexity and delay to the ALU.

Method 3: 2’s Complement (The Industry Standard)

2’s complement elegantly solves all the problems of the previous two methods. It is the universal standard for signed integer representation in modern computing (used in C, Java, Python, and all CPU architectures).

How It Works

• Positive numbers are represented normally (MSB = 0).
• To find the 2’s complement (negative) of a number:

1. Start with the positive binary representation.
2. Find the 1’s complement (invert all bits).
3. Add 1 to the result.

Example: Calculating -5 in 8-Bit 2’s Complement

1. Start with +5: 00000101
2. Invert all bits (1’s complement): 11111010
3. Add 1:

     11111010
   + 00000001
   ----------
     11111011

Result: -5 is represented as 11111011.

Why 2’s Complement is Superior

1. Single Zero: There is only one representation for zero (00000000). Inverting 00000000 gives 11111111, and adding 1 causes an overflow that wraps around back to 00000000.
2. Simplified ALU Design: The same binary addition circuit used for unsigned numbers works perfectly for signed 2’s complement numbers. The hardware doesn’t need to know if a number is positive or negative; it just adds the bits and discards any final carry-out.
3. Easy Negation: To negate a number, you just apply the 2’s complement process again. (Try it: invert 11111011 to get 00000100, add 1 to get 00000101, which is +5).

What is the range of an 8-bit signed binary number?
In an 8-bit 2’s complement system, the range of representable values is from -128 to +127. The MSB acts as the sign bit, leaving 7 bits for magnitude. The formula for an n-bit system is: $-2^{n-1}$ to $+(2^{n-1} – 1)$.

Range of Signed Binary Numbers

Because the MSB is reserved for the sign, an n-bit signed system has one fewer bit for the magnitude compared to an unsigned system. Furthermore, because there is only one zero, the negative range extends one value further than the positive range.

The mathematical range for an n-bit 2’s complement number is:
Minimum Value: $-2^{n-1}$
Maximum Value: $+(2^{n-1} – 1)$

Common Bit-Length Ranges

Bit Length (n)	Minimum Value	Maximum Value	Total Unique Values
4-bit	-8 ($-2^3$)	+7 ($2^3 – 1$)	16
8-bit (Byte)	-128 ($-2^7$)	+127 ($2^7 – 1$)	256
16-bit (Short)	-32,768	+32,767	65,536
32-bit (Int)	-2,147,483,648	+2,147,483,647	~4.29 Billion
64-bit (Long)	-9.22 × 10¹⁸	+9.22 × 10¹⁸	~1.84 × 10¹⁹

Notice that for 8-bit, the maximum positive number is 127 (01111111), and the minimum negative number is -128 (10000000). There is no +128 in 8-bit signed math.

Overflow in Signed Arithmetic

Because signed numbers have a fixed range, performing arithmetic can sometimes result in a value that exceeds the maximum or minimum limit. This is called overflow.

Unlike a carry-out (which is normal and expected in unsigned math), overflow in signed math corrupts the sign bit, resulting in a logically impossible answer (e.g., adding two positive numbers yields a negative result).

How to Detect Overflow

Overflow occurs only when:

1. Adding two positive numbers yields a negative result.
2. Adding two negative numbers yields a positive result.

(Note: Adding a positive and a negative number can never cause overflow, as the result will always be closer to zero than the operands).

Hardware Detection Rule:
In digital logic, overflow is detected by comparing the carry-in to the Most Significant Bit (MSB) with the carry-out from the MSB.

• If Carry-In to MSB ≠ Carry-Out from MSB, Overflow has occurred.
• If they are the same (both 0 or both 1), the result is valid.

Example: 4-Bit Signed Overflow

Let’s add +7 and +2 in a 4-bit system. The maximum positive value is +7, so this should overflow.

• +7 = 0111
• +2 = 0010

  Carry:  0 1 1 0
          0 1 1 1  (+7)
        + 0 0 1 0  (+2)
        ---------
          1 0 0 1  (Result)

Analysis:

• The result is 1001. In 4-bit 2’s complement, 1001 equals -7.
• We added two positive numbers and got a negative number. Overflow has occurred.
• Hardware check: Carry-in to the MSB (bit 3) was 1. Carry-out from the MSB was 0. Since $1 \neq 0$, the overflow flag is triggered.

Practical Applications of Signed Binary Numbers

1. Audio Signal Processing

Digital audio represents sound waves as a series of numbers. A sound wave oscillates above and below a zero-pressure baseline. Signed 16-bit or 24-bit 2’s complement integers are the standard format (like WAV files) because they perfectly represent both the positive and negative pressure deviations of the acoustic wave.

2. Graphics and Game Development

In 2D and 3D graphics, objects have coordinates (X, Y, Z). To move an object left or down, the system must add negative values to its coordinates. Signed integers allow the rendering engine to calculate movement in all directions seamlessly using standard addition.

3. Financial and Scientific Computing

Any application dealing with temperature, altitude, debt, or sub-atomic particle charge requires negative numbers. Programming languages default to signed integers (like int in C++ or Java) precisely because real-world data is rarely strictly positive.

Summary and Conclusion

Representing negative numbers in a system that only understands 1s and 0s was a significant historical challenge in computer science. While Sign-Magnitude and 1’s Complement offered intuitive starting points, their hardware inefficiencies and dual-zero problems made them impractical for modern computing.

2’s complement emerged as the elegant, universal solution. By simply inverting the bits and adding one, computers can represent negative numbers, maintain a single zero, and most importantly, use the exact same addition circuitry for all arithmetic operations.

Key takeaways from this guide include:

1. Sign-Magnitude: Uses the MSB as a sign flag, but suffers from dual zeros and complex ALU requirements.
2. 1’s Complement: Inverts all bits for negative numbers, but still suffers from dual zeros and requires end-around carries.
3. 2’s Complement: The industry standard. Invert bits and add 1. It provides a single zero and simplifies hardware design.
4. Range: An n-bit 2’s complement system ranges from $-2^{n-1}$ to $+(2^{n-1} – 1)$.
5. Overflow: Occurs when adding two numbers of the same sign yields a result with the opposite sign. Detected when carry-in to the MSB does not equal carry-out.

Understanding signed binary numbers is a critical milestone in digital logic. It bridges the gap between abstract mathematical concepts and the physical reality of how silicon chips process the complex, negative-inclusive world we live in.